/*
 * ADC.c
 *
 *  Created on: 2012.12.21.
 *      Author: AnnaBaba
 */

#include "ADC.h"

uint8_t adc_inited = 0;

void ADC_Initialize()
{
	// ADC1 -> DMA2 Stream0 Channel 0
	// ADC2 -> DMA2 Stream1 Channel 2
	// ADC3 -> DMA2 Stream2 Channel 1

	ADC_InitTypeDef       ADC_InitStructure;
	ADC_CommonInitTypeDef ADC_CommonInitStructure;
	DMA_InitTypeDef       DMA_InitStructure;

	ADC_StructInit(&ADC_InitStructure);
	ADC_CommonStructInit(&ADC_CommonInitStructure);
	DMA_StructInit(&DMA_InitStructure);

	/* Enable ADC, DMA2 and GPIO clocks ****************************************/
	RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2 | RCC_AHB1Periph_GPIOC, ENABLE);
	RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1 | RCC_APB2Periph_ADC2 | RCC_APB2Periph_ADC3, ENABLE);

	DMA_DeInit(DMA2_Stream0);
	DMA_DeInit(DMA2_Stream1);
	DMA_DeInit(DMA2_Stream2);
	// Common DMA configuration ****************************************/
	DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
	DMA_InitStructure.DMA_BufferSize = 1;
	DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
	DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Disable;
	DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
	DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
	DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
	DMA_InitStructure.DMA_Priority = DMA_Priority_High;
	DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
	DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull;
	DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
	DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
	/* DMA2 Stream0 channel0 configuration **************************************/
	DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)ADC1_DR_ADDRESS;
	//DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)&ADC1ConvertedValue;
	DMA_InitStructure.DMA_Channel = DMA_Channel_0;
	DMA_Init(DMA2_Stream0, &DMA_InitStructure);
	//DMA_Cmd(DMA2_Stream0, ENABLE);
	/* DMA2 Stream1 channel2 configuration **************************************/
	DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)ADC2_DR_ADDRESS;
	//DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)&ADC2ConvertedValue;
	DMA_InitStructure.DMA_Channel = DMA_Channel_1;
	DMA_Init(DMA2_Stream2, &DMA_InitStructure);
	//DMA_Cmd(DMA2_Stream2, ENABLE);
	/* DMA2 Stream2 channel1 configuration **************************************/
	DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)ADC3_DR_ADDRESS;
	//DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)&ADC3ConvertedValue;
	DMA_InitStructure.DMA_Channel = DMA_Channel_2;
	DMA_Init(DMA2_Stream1, &DMA_InitStructure);
	//DMA_Cmd(DMA2_Stream1, ENABLE);


	 /* ADC Common Init **********************************************************/
	ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent;
	ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div2;
	ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled;
	ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles;
	ADC_CommonInit(&ADC_CommonInitStructure);

	/* ADC Init ****************************************************************/
	ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b;
	ADC_InitStructure.ADC_ScanConvMode = DISABLE;
	ADC_InitStructure.ADC_ContinuousConvMode = DISABLE;
	ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None;
	ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Left;
	ADC_InitStructure.ADC_NbrOfConversion = 1;
	ADC_Init(ADC1, &ADC_InitStructure);
	ADC_Init(ADC2, &ADC_InitStructure);
	ADC_Init(ADC3, &ADC_InitStructure);

	/* Enable DMA request after last transfer (Single-ADC mode) */
	ADC_DMARequestAfterLastTransferCmd(ADC1, ENABLE);
	ADC_DMARequestAfterLastTransferCmd(ADC2, ENABLE);
	ADC_DMARequestAfterLastTransferCmd(ADC3, ENABLE);

	/* Enable ADCs DMA */
	ADC_DMACmd(ADC1, ENABLE);
	ADC_DMACmd(ADC2, ENABLE);
	ADC_DMACmd(ADC3, ENABLE);

	/* Enable ADCs */
	ADC_Cmd(ADC1, ENABLE);
	ADC_Cmd(ADC2, ENABLE);
	ADC_Cmd(ADC3, ENABLE);

	adc_inited = 1;
}

void ADC_ChangeChannel(uint8_t ADC1channel, uint8_t ADC2channel, uint8_t ADC3channel){
	/* ADC3 regular channel3 configuration *************************************/
	ADC_RegularChannelConfig(ADC1, ADC1channel, 1, ADC_SampleTime_3Cycles);
	ADC_RegularChannelConfig(ADC2, ADC2channel, 1, ADC_SampleTime_3Cycles);
	ADC_RegularChannelConfig(ADC3, ADC3channel, 1, ADC_SampleTime_3Cycles);
}

void ADC_SetDMATarget(DMA_Stream_TypeDef* DMAy_Streamx, uint32_t MemoryBaseAddr)
{
	DMA_Cmd(DMAy_Streamx, DISABLE);
	DMA_MemoryTargetConfig(DMAy_Streamx, MemoryBaseAddr, DMA_Memory_0);
	DMA_Cmd(DMAy_Streamx, ENABLE);
}
